This invention relates generally to a semiconductor memory device which improves the integration density, and more particularly to a semiconductor memory device having a trench type capacitor such as a D-RAM (a dynamic random access memory).
A D-RAM needs a smaller number of elements constituting memory cells than an S-RAM (static random access memory), but further miniaturization of the elements must be made in order to satisfy the requirement for a higher integration density. Attempts have therefore been made to miniaturize the memory element and to improve the integration density by reducing the area of a capacitor that occupies a relatively large area among constituents of the memory element.
For instance, a semiconductor device shown in FIG. 1 of the accompanying drawings has a so-called "trench type capacitor structure". A trench 2 is defined on the surface of a semiconductor substrate 1, and an insulating film 3 such as SiO.sub.2 is disposed along the side walls or bottom surface of this trench 2. A polysilicon film 4 as a first electrode is then formed, thereby forming a capacitor C.sub.1 in the direction of thickness (depth) of the substrate 1. In the drawing, symbol Q.sub.1 represents an MOS (medal oxide semiconductor) field effect transistor (MOSFET) that constitutes a memory element and is connected to the capacitor C.sub.1. The transistor Q.sub.1 is equipped with a diffusion layer 5 as a source-drain region, a gate insulating film 6 such as an SiO.sub.2 film and a gate electrode (second gate electrode) 7 consisting of polysilicon.
In this D-RAM structure, the capacitor C.sub.1 secures a predetermined capacity by the electrode surface extending in the direction of thickness of the substrate 1. For this reason, the occupying area of unit memory element can be reduced in comparison with a conventional type which requires the same area in the direction of the plane of the substrate, so that the integration density can be drastically improved.
As can be seen from FIG. 1, however, this structure makes use of an element isolation film (a field insulating film) 8 disposed on the surface of the substrate 1 in order to isolate adjacent capacitors C.sub.1 and C.sub.1 from each other. Therefore, a leakage current is likely to develop between the capacitors C.sub.1 and C.sub.1 below the element isolation film 8, that is, between the memory elements, and this leakage current results in the drop of reliability of the memory device. To eliminate this problem, the gap (isolation dimension) l.sub.v between the capacitors C.sub.1 and C.sub.1 must be sufficient to prevent the leak. This in turn results in a corresponding increase of pitch l.sub.p of unit memory element, and hinders the miniaturization and high integration density of the device.
Incidentally, D-RAM using the trench type capacitors is disclosed, for example, in Japanese Kokai 58-130178.